Ibrahimkutty S., Wagener P., Rolo T.D.S., Karpov D., Menzel A., Baumbach T., Barcikowski S., Plech A.

in Scientific Reports, 5 (2015), 16313. DOI:10.1038/srep16313

Abstract

Pulsed-laser assisted nanoparticle synthesis in liquids (PLAL) is a versatile tool for nanoparticle synthesis. However, fundamental aspects of structure formation during PLAL are presently poorly understood. We analyse the spatio-temporal kinetics during PLAL by means of fast X-ray radiography (XR) and scanning small-angle X-ray scattering (SAXS), which permits us to probe the process on length scales from nanometers to millimeters with microsecond temporal resolution. We find that the global structural evolution, such as the dynamics of the vapor bubble can be correlated to the locus and evolution of silver nanoparticles. The bubble plays an important role in particle formation, as it confines the primary particles and redeposits them to the substrate. Agglomeration takes place for the confined particles in the second bubble. Additionally, upon the collapse of the second bubble a jet of confined material is ejected perpendicularly to the surface. We hypothesize that these kinetics influence the final particle size distribution and determine the quality of the resulting colloids, such as polydispersity and modality through the interplay between particle cloud compression and particle release into the liquid.

Riechelmann, Max

Diploma Thesis, Faculty for Computer Science, Karlsruhe Institute of Technology, 2015.

Abstract

NVIDIAs recently presented GPUDirect RDMA technology allows direct communication on the PCIe bus between NVIDIA GPUs and other devices. The ability to bypass main memory and write and read directly into/from the GPU memory is expected to decrease the latency of data tranfer actions. KIRO (KITs InfiniBand remote communication library) is used to provide high-performance communication for control systems at the image beam line of the ANKA synchrotron. To improve the reaction time of control systems and be ready for cameras with throughput of several gigabytes per second, we have modified KIRO to use the GPUDirect RDMA technology. Using this approach we were able to reach throughput rates of 40 GBit/s and could nearly halve the latency. The GPUDirect technology and the updated architecture of KIRO will be presented in this work. The achieved performance and feasability of the integration in the current workflow will be discussed.

 

First assessor: Prof. Dr. Wolfgang Karl
Second assessor: Prof. Dr. Marc Weber

Supervised by Dipl.-Inform. Timo Dritschler,  Dr. Ing. Mario Kicherer

Stevanovic U., Caselle M., Cecilia A., Chilingaryan S., Farago T., Gasilov S., Herth A., Kopmann A., Vogelgesang M., Balzer M., Baumbach T., Weber M.

in IEEE Transactions on Nuclear Science, 62 (2015) 911-918, 7111386. DOI:10.1109/TNS.2015.2425911

Abstract

© 1963-2012 IEEE.High-speed X-ray imaging applications play a crucial role for non-destructive investigations of the dynamics in material science and biology. On-line data analysis is necessary for quality assurance and data-driven feedback, leading to a more efficent use of a beam time and increased data quality. In this article we present a smart camera platform with embedded Field Programmable Gate Array (FPGA) processing that is able to stream and process data continuously in real-time. The setup consists of a Complementary Metal-Oxide-Semiconductor (CMOS) sensor, an FPGA readout card, and a readout computer. It is seamlessly integrated in a new custom experiment control system called Concert that provides a more efficient way of operating a beamline by integrating device control, experiment process control, and data analysis. The potential of the embedded processing is demonstrated by implementing an image-based trigger. It records the temporal evolution of physical events with increased speed while maintaining the full field of view. The complete data acquisition system, with Concert and the smart camera platform was successfully integrated and used for fast X-ray imaging experiments at KIT’s synchrotron radiation facility ANKA.

Rota L., Caselle M., Chilingaryan S., Kopmann A., Weber M.

in IEEE Transactions on Nuclear Science, 62 (2015) 972-976, 7111377. DOI:10.1109/TNS.2015.2426877

Abstract

© 2014 IEEE.We developed a direct memory access (DMA) engine compatible with the Xilinx PCI Express (PCIe) core to provide a high-performance and low-occupancy alternative to commercial solutions. In order to maximize the PCIe throughput while minimizing the FPGA resources utilization, the DMA engine adopts a novel strategy where the DMA address list is stored inside the FPGA and not in the central memory of the host CPU. The FPGA design package is complemented with simple register access to control the DMA engine by a Linux driver. The design is compatible with Xilinx FPGA Families 6 and 7, and operates with the Xilinx PCIe endpoint Generation 1 and 2 with all lane configurations (x1, x2, x4, x8). A multi-engine architecture is also presented, where two x8 lanes cores are used in parallel together with a PCIe bridge, to exploit fully the capabilities of a PCIe Gen2 x16 lanes link. A data throughput of 3461 MBytes/s has been achieved with a single PCIe Gen2 x8 lanes endpoint. If the dual-engine architecture is used, the throughput is increased up to 6920 MBytes/s. The presented DMA is currently used in several experiments at the ANKA synchrotron light source.

Stevanovic U., Caselle M., Cecilia A., Chilingaryan S., Farago T., Gasilov S., Herth A., Kopmann A., Vogelgesang M., Balzer M., Baumbach T., Weber M.

in IEEE Transactions on Nuclear Science, 62 (2015) 911-918, 7111386. DOI:10.1109/TNS.2015.2425911

Abstract

© 1963-2012 IEEE. High-speed X-ray imaging applications play a crucial role for non-destructive investigations of the dynamics in material science and biology. On-line data analysis is necessary for quality assurance and data-driven feedback, leading to a more efficent use of a beam time and increased data quality. In this article we present a smart camera platform with embedded Field Programmable Gate Array (FPGA) processing that is able to stream and process data continuously in real-time. The setup consists of a Complementary Metal-Oxide-Semiconductor (CMOS) sensor, an FPGA readout card, and a readout computer. It is seamlessly integrated in a new custom experiment control system called Concert that provides a more efficient way of operating a beamline by integrating device control, experiment process control, and data analysis. The potential of the embedded processing is demonstrated by implementing an image-based trigger. It records the temporal evolution of physical events with increased speed while maintaining the full field of view. The complete data acquisition system, with Concert and the smart camera platform was successfully integrated and used for fast X-ray imaging experiments at KIT’s synchrotron radiation facility ANKA.

Rota L., Caselle M., Chilingaryan S., Kopmann A., Weber M.

in IEEE Transactions on Nuclear Science, 62 (2015) 972-976, 7111377. DOI:10.1109/TNS.2015.2426877

Abstract

© 2014 IEEE. We developed a direct memory access (DMA) engine compatible with the Xilinx PCI Express (PCIe) core to provide a high-performance and low-occupancy alternative to commercial solutions. In order to maximize the PCIe throughput while minimizing the FPGA resources utilization, the DMA engine adopts a novel strategy where the DMA address list is stored inside the FPGA and not in the central memory of the host CPU. The FPGA design package is complemented with simple register access to control the DMA engine by a Linux driver. The design is compatible with Xilinx FPGA Families 6 and 7, and operates with the Xilinx PCIe endpoint Generation 1 and 2 with all lane configurations (x1, x2, x4, x8). A multi-engine architecture is also presented, where two x8 lanes cores are used in parallel together with a PCIe bridge, to exploit fully the capabilities of a PCIe Gen2 x16 lanes link. A data throughput of 3461 MBytes/s has been achieved with a single PCIe Gen2 x8 lanes endpoint. If the dual-engine architecture is used, the throughput is increased up to 6920 MBytes/s. The presented DMA is currently used in several experiments at the ANKA synchrotron light source.

Stevanovic U., Caselle M., Cecilia A., Chilingaryan S., Farago T., Gasilov S., Herth A., Kopmann A., Vogelgesang M., Balzer M., Baumbach T., Weber M.

in IEEE Transactions on Nuclear Science (2015). DOI:10.1109/TNS.2015.2425911

Abstract

High-speed X-ray imaging applications play a crucial role for non-destructive investigations of the dynamics in material science and biology. On-line data analysis is necessary for quality assurance and data-driven feedback, leading to a more efficent use of a beam time and increased data quality. In this article we present a smart camera platform with embedded Field Programmable Gate Array (FPGA) processing that is able to stream and process data continuously in real-time. The setup consists of a Complementary Metal-Oxide-Semiconductor (CMOS) sensor, an FPGA readout card, and a readout computer. It is seamlessly integrated in a new custom experiment control system called Concert that provides a more efficient way of operating a beamline by integrating device control, experiment process control, and data analysis. The potential of the embedded processing is demonstrated by implementing an image-based trigger. It records the temporal evolution of physical events with increased speed while maintaining the full field of view. The complete data acquisition system, with Concert and the smart camera platform was successfully integrated and used for fast X-ray imaging experiments at KIT’s synchrotron radiation facility ANKA.

Rota L., Caselle M., Chilingaryan S., Kopmann A., Weber M.

in IEEE Transactions on Nuclear Science (2015). DOI:10.1109/TNS.2015.2426877

Abstract

We developed a direct memory access (DMA) engine compatible with the Xilinx PCI Express (PCIe) core to provide a high-performance and low-occupancy alternative to commercial solutions. In order to maximize the PCIe throughput while minimizing the FPGA resources utilization, the DMA engine adopts a novel strategy where the DMA address list is stored inside the FPGA and not in the central memory of the host CPU. The FPGA design package is complemented with simple register access to control the DMA engine by a Linux driver. The design is compatible with Xilinx FPGA Families 6 and 7, and operates with the Xilinx PCIe endpoint Generation 1 and 2 with all lane configurations (x1, x2, x4, x8). A multi-engine architecture is also presented, where two x8 lanes cores are used in parallel together with a PCIe bridge, to exploit fully the capabilities of a PCIe Gen2 x16 lanes link. A data throughput of 3461 MBytes/s has been achieved with a single PCIe Gen2 x8 lanes endpoint. If the dual-engine architecture is used, the throughput is increased up to 6920 MBytes/s. The presented DMA is currently used in several experiments at the ANKA synchrotron light source.

Dyroff C., Sanati S., Christner E., Zahn A., Balzer M., Bouquet H., McManus J.B., Gonzalez-Ramos Y., Schneider M.

in Atmospheric Measurement Techniques, 8 (2015) 2037-2049. DOI:10.5194/amt-8-2037-2015

Abstract

© Author(s) 2015.Vertical profiles of water vapor (H2O) and its isotope ratio D/H expressed as δD(H2O) were measured in situ by the ISOWAT II diode-laser spectrometer during the MUlti-platform remote Sensing of Isotopologues for investigating the Cycle of Atmospheric water (MUSICA) airborne campaign. We present recent modifications of the instrument design. The instrument calibration on the ground as well as in flight is described. Based on the calibration measurements, the humidity-dependent uncertainty of our airborne data is determined. For the majority of the airborne data we achieved an accuracy (uncertainty of the mean) of δ(δD) ≈10‰. Vertical profiles between 150 and ∼7000 m were obtained during 7 days in July and August 2013 over the subtropical North Atlantic Ocean near Tenerife. The flights were coordinated with ground-based (Network for the Detection of Atmospheric Composition Change, NDACC) and space-based (Infrared Atmospheric Sounding Interferometer, IASI) FTIR remote sensing measurements of δD(H2O) as a means to validate the remote sensing humidity and δD(H2O) data products. The results of the validation are presented in detail in a separate paper (Schneider et al., 2014). The profiles were obtained with a high vertical resolution of around 3 m. By analyzing humidity and δD(H2O) correlations we were able to identify different layers of air masses with specific isotopic signatures. The results are discussed.

Rota L., Caselle M., Chilingaryan S., Kopmann A., Weber M.

in 2014 19th IEEE-NPSS Real Time Conference, RT 2014 – Conference Records (2015), 7097561. DOI:10.1109/RTC.2014.7097561

Abstract

© 2014 IEEE. PCI Express (PCIe) is a high-speed serial point-to-point interconnect that delivers high-performance data throughput. KIT has developed a Direct Memory Access (DMA) engine compatible with the Xilinx PCIe core to provide a smart and low-occupancy alternative logic to expensive commercial solutions. In order to maximize the PCIe throughput the DMA engine adopts a new strategy, where the DMA descriptor list is stored inside the FPGA and not in the central memory system. The FPGA design package is complemented with a simple register access to control the DMA engine by a Linux driver. A handshaking sequence between the DMA engine and the Linux driver ensures that no errors occure, even in data transfers of several hundreds of Gigabytes. The design has been tested with Xilinx FPGA Families 6 and 7, and operates with the Xilinx PCIe endpoint generation 1 and 2 with all lane configurations (x1, x2, x4, x8, x16). Data throughput of more than 3.4 GB/s has been achieved with a PCIe Gen 2 ×8 lanes endpoint. The proposed DMA is currently used in several experiments at the ANKA synchrotron light source.